PMIC - Qualcomm Dragonwing Documentation

The PMIC is a specialized electronic component that manages various power supply requirements within a device. The PMIC oversees power supply requirements, including the following:

Battery management tasks such as charging and gauging.
User interface components such as flash, display, and RGB color space.
System-on-chip (SoC) infrastructure elements such as clocks, analog-to-digital converters (ADC), and power-on (PON) functions.

Some PMIC resources can be customized in XBL through the XBL_CFG image. Configuring the PMIC XBL DT properties ensure optimal performance and integration. You can perform these customizations using a DT framework. The PMIC DTSI files for the Linux device are at boot_images/boot/Settings/Soc/<Chipset>/Core/PMIC/pm.dtsi, access.dtsi.

Table: PMIC DT properties

Property name	Property description	Data type	Possible values / value range	Device behavior
`s2-kpdpwr`	Enable PMIC power key pin reset configuration.	Boolean	• `PM_TRUE` • `PM_FALSE`	The power key is configured to reset or shut down the device when asserted for durations specified in `s1-ms` and `s2-ms`. For `PM_FALSE`, hardware default settings are used.
`reset-type`	Select the reset type.	UINT8	• `PM_WARM_RESET` • `PM_HARD_RESET` • `PM_SHUTDOWN`	• WARM_RESET: crash dump collection • HARD_RESET: reboot • SHUTDOWN: shutdown
`s1-ms`	Assertion time (choose from supported values).	UINT32	0, 32, 56, 80, 128, 184, 272, 408, 608, 904, 1352, 2048, 3072, 4480, 6720, 10256	`KPDPWR_N_RESET_S1_TIMER` in ms
`s2-ms`	Assertion time (choose from supported values).	UINT32	0, 10, 50, 100, 250, 500, 1000, 2000	`KPDPWR_N_RESET_S2_TIMER` in ms
`s2-kpdpwr-resin`	Configure PMIC power and resin key combination.	Boolean	• `PM_TRUE` • `PM_FALSE`	Both power and resin key combinations apply for durations in `s1-ms` and `s2-ms`. For `PM_FALSE`, hardware defaults are used.
`reset-type`	Select the reset type.	UINT32	• `PM_WARM_RESET` • `PM_HARD_RESET` • `PM_SHUTDOWN`	WARM_RESET: crash dump, HARD_RESET: reboot, SHUTDOWN: shutdown
`s1-ms`	Assertion time (select supported value).	UINT32	0, 32, 56, 80, 128, 184, 272, 408, 608, 904, 1352, 2048, 3072, 4480, 6720, 10256	`RESIN_AND_KPDPWR_RESET_S1_TIMER` in ms
`s2-ms`	Assertion time (select supported value).	UINT32	0, 10, 50, 100, 250, 500, 1000, 2000	`RESIN_AND_KPDPWR_RESET_S2_TIMER` in ms
`s2-resin`	Configure resin key pin used as volume down.	Boolean	• `PM_TRUE` • `PM_FALSE`	Resin key can reset or shut down device when asserted for `s1-ms` / `s2-ms`. For `PM_FALSE`, hardware defaults apply.
`reset-type`	Select the reset type.	UINT8	• `PM_WARM_RESET` • `PM_HARD_RESET` • `PM_SHUTDOWN`	WARM_RESET: crash dump, HARD_RESET: reboot, SHUTDOWN: shutdown
`s1-ms`	Assertion time (select supported value).	UINT32	0, 32, 56, 80, 128, 184, 272, 408, 608, 904, 1352, 2048, 3072, 4480, 6720, 10256	`RESIN_N_RESET_S1_TIMER` in ms
`s2-ms`	Assertion time (select supported value).	UINT32	0, 10, 50, 100, 250, 500, 1000, 2000	`RESIN_N_RESET_S2_TIMER` in ms
`s3-reset`	Configure S3 reset.	Boolean	• `PM_TRUE` • `PM_FALSE`	Used as fail‑safe reset or factory reset when S2 reset fails. Triggered after timer expiry.
`s3-src`	Select the reset source.	UINT8	• `PM_PON_RESET_SOURCE_KPDPWR` • `PM_PON_RESET_SOURCE_RESIN` • `PM_PON_RESET_SOURCE_RESIN_AND_KPDPWR` • `PM_PON_RESET_SOURCE_RESIN_OR_KPDPWR`	Power key, resin key, or combination
`timervalue-ms`	Assertion time for S3 reset.	UINT32	0, 8, 16, 32, 63, 125, 240, 500, 1000, 2000, 4000, 8000, 16000, 32000, 64000, 128000	`RESET_S3_TIMER_n` in ms
`uvlo-config`	Configure under‑voltage lockout threshold.	UINT8	PMIC_A, PMIC_B, PMIC_C, PMIC_D, PMIC_E, PMIC_I, PMIC_K	Device shuts down when UVLO threshold is reached.
`uvlo_thresh`	UVLO threshold.	UINT32	mV	Threshold in millivolts
`uvlo_hyst`	UVLO hysteresis.	UINT32	mV	Hysteresis in millivolts
`uvlo_enable`	Enable UVLO config.	Boolean	`PM_ENABLE`, `PM_DISABLE`	For `PM_DISABLE`, hardware defaults are applied.
`ovlo-config`	Configure over‑voltage lockout threshold.	PMIC_INDEX	PMIC_A–PMIC_K	Device shuts down when OVLO threshold is reached.
`ovlo_thresh`	OVLO threshold.	–	mV	Threshold in millivolts
`ovlo_hyst`	OVLO hysteresis.	–	mV	Hysteresis in millivolts
`ovlo_enable`	Enable OVLO config.	–	`PM_ENABLE`, `PM_DISABLE`	For `PM_DISABLE`, hardware defaults are applied.
`Long-pwrkey-dbnc-chk`	Power‑key debounce check during boot.	UINT32	msec	Device shuts down if key not pressed within debounce window.
`chk-at`	Stage to check keypress.	UINT8	0, 1, 2	0: no check, 1: XBL Loader, 2: XBL core (UEFI)
`sw-config`	Modify PMIC SW config during boot for LDO, SMPS, clocks, GPIOs.	UINT32	PM_EVENT_LOG_LEVEL_*	Controls verbosity of PON logs in UART.
`Charger`	Charger configuration group.	UINT32	PMIC_D / PMIC_I	Primary charger PMIC index.
`no-batt-cfg-enable`	Enable battery‑less configuration.	UINT8	`PM_TRUE`, `PM_FALSE`	Device boots automatically if battery is not detected.
`Secondary-charger-present`	Indicate secondary charger presence.	UINT8	`PM_TRUE`, `PM_FALSE`	Secondary charger settings.

SMPS/LDO/CLK sample code

driver-post-init = <
      // PM_SMPS_SET_AHC_HR        PM_BUSID_0   PMIC_C  PM_SMPS_1    0x57
      // PM_SMPS_SET_ULS           PM_BUSID_0   PMIC_F  PM_SMPS_6    1375000          /*The Voltage is in microVolts*/
      // PM_LDO_SET_ULS            PM_BUSID_0   PMIC_F  PM_SMPS_6    1375000          /*The Voltage is in microVolts*/
      // PM_CLK_ENABLE             PM_BUSID_0   PMIC_A  PM_CLK_RF_1  PM_TRUE
      // PM_SMPS_SET_VOLT          PM_BUSID_0   PMIC_B  PM_SMPS_1    1200
      // PM_SMPS_SET_AHC           PM_BUSID_0   PMIC_B  PM_SMPS_1    PM_FALSE
      // PM_LDO_SET_AHC            PM_BUSID_0   PMIC_B  PM_LDO_1     PM_FALSE
      // PM_LDO_SET_VOLT           PM_BUSID_0   PMIC_B  PM_LDO_1     1200
      // PM_LDO_SET_MODE           PM_BUSID_0   PMIC_B  PM_LDO_1     PM_SW_MODE_NPM
      // PM_SMPS_SET_MODE          PM_BUSID_0   PMIC_B  PM_SMPS_1    PM_SW_MODE_NPM
      // PM_SMPS_SET_PD_CTRL       PM_BUSID_0   PMIC_B  PM_SMPS_1    PM_TRUE
      // PM_SMPS_SET_PIN_CTRL      PM_BUSID_0   PMIC_B  PM_SMPS_1    PM_TRUE
      // PM_SMPS_SET_OCP_BROADCAST PM_BUSID_0   PMIC_B  PM_SMPS_1    PM_TRUE
      // PM_LDO_SET_PD_CTRL        PM_BUSID_0   PMIC_B  PM_LDO_1     PM_TRUE
      // PM_LDO_SET_PIN_CTRL       PM_BUSID_0   PMIC_B  PM_LDO_1     PM_TRUE
      // PM_LDO_SET_OCP_BROADCAST  PM_BUSID_0   PMIC_B  PM_LDO_1     PM_TRUE
      // PM_CLK_DRV_STR            PM_BUSID_0   PMIC_A  PM_CLK_RF_1  3
      // PM_SMPS_SET_ENABLE        PM_BUSID_0   PMIC_B  PM_SMPS_1    PM_TRUE
      // PM_LDO_SET_ENABLE         PM_BUSID_0   PMIC_B  PM_LDO_1     PM_TRUE
      // PM_SPMI_CLK_DATA_CFG      PM_BUSID_0   PMIC_A  0x2          0x2              /*BUS_ID, PMIC_ID, CLK buff Config, DATA buff Config*/
      PM_DELAY(10)
      > ;

​SMPS/LDO/CLK sample code

SMPS/LDO/CLK sample code